More about Logic Gates

More about Logic Gates 

1.Consider a 4-bit adder with inputs A={A3 A2 A1 A0} and B = {B3 B2 B1 B0} . For which of the following input condition no carry-out would be generated.

a.       A={1011}   B={0101}

b.      A={1011}   B={0001}

c.       A={1011}   B={0100}

d.      A={1001}   B={0101}

Ans . a

         

2. XNOR (A,B)  can be written as

           XNOR = AB+A’B’ ,

      

3.      When 2 8-bit numbers A₇….A₀ and B₇….B₀ in 2’s complement representation are added using ripple-carry adder. The sum bits obtained are s₇…s₀ and the carry bits c₇…c₀.  An overflow is said to have occurred if  

1.      4. Half Adder of input A & B,

5.      Noise Margin High  =  V_OH - V_IH    

          Noise Margin Low  = V_IL - V_OL

          For better output Noise margin high & Noise margin high should be very high ,

          V_OH > V_IH     &  V_IL > V_OL

         Therefore , the correct relationship is V_OH > V_IH >V_IL >  V_OL

_{6 .} 

 7.      Number of NAND gate to implement full adder

       Sum = A⊕ B⊕ C

       Carry = AB + C(A⊕ B)

8.   Half Subtractor

Difference = x ⊕  y

Borrow = x’y  

9. If the output of the digital circuit makes a momentary transition to logic ‘1’ , while otherwise the output is logic ‘0’ , is called as Static-0 hazard.

10 . Full adder using half adder , 2 HA and 1 OR gate

11.(AB+C)’ à  Upper part is for inverse and

·         A & B series , so AND  gate

·         C is in parallel with AB , So OR gate

12. In parallel binary adder/subtractor,  ‘X’ = 1, if there is an overflow during either addition or subtraction.

13. The product term to be included to remove possible static hazard for the function

WX+W’Y’ = xy’

Minterms of WX+W’Y’ = ∑(0,2,6,7)

14. Properties of CMOS logic gates are

·                 Low static power consumption

·                 High packing density

·                 High Noise Margin

      So, High switching speed is not the property.

15. The number “00101110” when converted to BCD is “01000110”